As design nodes drop below 45nm, design rules are exploding in number and complexity, making design rule checking (DRC) harder and lengthier. What we have observed across the industry is that the ...

It’s no secret that a successful yield ramp directly impacts integrated circuit (IC) product cost and time-to-market. Tools and techniques that help companies ramp to volume faster, while also ...

How often have you struggled to verify static random-access memory (SRAM) blocks in your design? And how often, no matter how much time you spend on them, do they end up causing manufacturing issues?

Unlock the full InfoQ experience by logging in! Stay updated with your favorite authors and topics, engage with content, and download exclusive resources. Vivek Yadav, an engineering manager from ...

Analog circuits often use structures like differential pairs and current mirrors, where the matching of device characteristics such as the threshold voltage V t is important. Circuits using these ...