Design-Reuse

IP Verification : RTL prototyping: a hardware/software co-verification solution

Traditional ASIC and IP verification methods cannot adequately exercise the hardware and software components of today's designs. This is due to tool performance limitations, which impose a bottleneck ...
Design-Reuse

Blue Pearl Software Streamlines RTL Verification for Xilinx All Programmable FPGAs and SoCs

SANTA CLARA, California, Jul. 25, 2017 – Blue Pearl Software, Inc., the leading provider of design automation software for ASIC, FPGA and IP RTL verification, today announced Visual Verification Suite ...
EDN

Software increases RTL design productivity

The Cadence Joules RTL Design Studio allows front-end engineers to accelerate and improve register transfer level (RTL) design and implementation. By providing access to the physical information ...
EDN

Certify ASIC RTL Prototyping Software

Certify ASIC RTL Prototyping solution is the leading product for ASIC prototyping using multiple FPGAs. The Certify software is the industry's first register transfer level (RTL) prototyping solution ...
Hackaday

RTL-SDR With Only A Browser

Surely by now you’ve at least heard of RTL-SDR — a software project that let’s cheap TV tuner dongles work as a software-defined radios. A number of projects and tools have spun off the original ...